calculators

Heuristic chip manufacturing lead-time estimation (MANUFACTURING CYCLE TIME — wafer fab + packaging assembly/test, as m…

Heuristic chip manufacturing lead-time estimation (MANUFACTURING CYCLE TIME — wafer fab + packaging assembly/test, as min/max weeks). Mask layers × utilization-scaled days-per-mask-layer + a packaging-class adder. EXCLUDES allocation/booking queue time — see /api/v1/allocation for booking windows.

post/api/v1/calculate/lead-time

Request

  • Base URL: https://siliconanalysts.com
  • URL: https://siliconanalysts.com/api/v1/calculate/lead-time
  • Auth: none required

Request body

maskLayersstring

Total mask layers, integer 10–200 (required unless processNode is set)

processNodestring

Foundry node ID for node-aware defaults: tsmc-n3 | tsmc-n5 | tsmc-n7 | tsmc-n16 | tsmc-28 | samsung-3nm | samsung-5nm | samsung-7nm | samsung-14nm | intel-7 | intel-16 | gf-12lp | gf-fdx | umc-22-28 | umc-40 | smic-28 (optional; supplies typical mask count + DPML factor)

utilizationstring

Foundry utilization % 0–100 (optional; defaults from live foundry-allocation data for the node, else a documented constant — the fired default is echoed in assumptions)

packagingTypestring

Coarse class conventional | flip-chip | cowos (default flip-chip), or any platform packaging id (fc-bga, wirebond-bga, cowos-l, copos, qfn, fowpl, 3d-stacking, ...)

Response

Successful response

successboolean
dataobject
metaobject

Changes

No recorded changes to this operation across all 1 revision of this API.