calculators

Programmatic chip cost estimation.

Programmatic chip cost estimation. Accepts die dimensions, process node, and optional parameters. Returns full cost breakdown including yield, GDPW, and per-unit economics.

post/api/v1/calculate/chip-cost

Request

Base URL: https://siliconanalysts.com
URL: https://siliconanalysts.com/api/v1/calculate/chip-cost
Auth: none required

Request body

dieWidthstring

Die width in mm (required)

dieHeightstring

Die height in mm (required)

processNodestring

Foundry node ID (optional, default: tsmc-n5)

waferCoststring

Override wafer cost in USD (optional, uses benchmark if omitted)

packagingTypestring

Packaging architecture (optional, default: flip-chip)

packagingCoststring

Override packaging cost in USD (optional)

hbmStacksstring

Number of HBM stacks (optional, default: 0)

hbmCoststring

HBM cost per GB (optional, default: 0)

testCoststring

Test cost per unit in USD (optional, default: 2)

marginTargetstring

Target gross margin percentage (optional, default: 50)

volumestring

Production volume (optional, default: 10000)

energyRegionstring

energyFacilityOverheadstring

Apply the ~1.75× facility-overhead multiplier to the energy adder (optional, default: true; only meaningful with energyRegion)

substratestring

Packaging substrate SCENARIO: wafer-300mm (default, no-op) | panel-310x310 — applies the midpoint of Yole's realistic 20–30% CoPoS panel-savings band to the packaging cost only; silicon GDPW unchanged (SA scenario; TSMC CoPoS pilot ~Jun 2026, MP 2028–29)

kgdTestCoveragestring

Known-Good-Die pre-bond test coverage % (0–100, optional). Returns a kgdScenario block: per-die test cost at this coverage vs. the packaged-defect waste it avoids, effective KGD quality, and the cost-minimizing coverage. Informational — never changes the headline cost. Absent = no-op (SA scenario).

Response

Successful response

successboolean

dataobject

metaobject

Changes

No recorded changes to this operation across all 1 revision of this API.