P045 Description (Translated)

{
  "data": [
    {
      "pn": "US11205304B2",
      "patent_id": "718ead9c-4f3c-4674-8f5a-24e126827269",
      "pn_related": "CN103106923A",
      "description": "technical field[0001] The present invention relates generally to semiconductor memory devices, and more particularly, to non-volatile memory device architectures having various block sizes.Background technique[0002] Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory, including random access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.[0003] Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use one-transistor memory cells that allow for high memory density, high reliability, and low power consumption. A change in the threshold voltage of a cell, caused by programming of the charge storage device or trapping layer, or other physical phenomenon, determines the data value of each cell. Common uses for flash memory and other nonvolatile memory include personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, cellular phones, and Removable memory modules, and the use of non-volatile memory continues to expand.[0004] Flash memory generally utilizes two basic architectures known as NOR flash and NAND flash. The design is derived from the logic used to read the device. In a NOR flash architecture, a column of memory cells is coupled in parallel with each memory cell coupled to a bit line. In a NAND flash architecture, a column of memory cells is coupled in series with only the first memory cell of the column coupled to a bit line.[0005] Flash memory and other non-volatile memory are often grouped into sectors called \\\"erase blocks.\\\" Each cell within an erase block can be selectively electrically programmed by altering the threshold voltage of individual cells from an initial state. However, the cells of an erase block are generally erased or restored to their original state in a single operation over the entire block. Any data in the erase block that needs to be held by the memory device must first be copied to another location or buffer before performing the erase operation..."
    }
  ],
  "error_msg": "The request parameter format is incorrect！"
}